Broadcom and Marvell: where value sits between the switch and the optical module

Start with the boundary, not the ticker

An AI fabric has more than one place where semiconductor value can sit. A switch ASIC accepts packets and decides how they leave a fabric. A pluggable optical DSP sits in the module and turns a high-speed electrical host signal into a conditioned optical lane, then performs the reverse operation at the far end. An active electrical cable (AEC) uses retiming electronics to extend a short copper path. These are adjacent parts of one link, but they have different qualification cycles, failure modes, and bills of materials.

Broadcom describes Tomahawk 6 as a 102.4 Tb/s switch family with 100G or 200G SerDes and support for co-packaged optics; its AI infrastructure page also places switching silicon and a 1.6T transceiver PHY in the same portfolio. Marvell's Ara T brief describes eight 200 Gb/s PAM4 electrical host lanes and eight 200 Gb/s optical lanes in a 1.6T transmit-retimed DSP. Those are product capabilities, not evidence of a particular cloud order, supplier share, or revenue amount.

1. 1XPU / NIC

1. 1
2. 28 electrical 200G lanes

1. 1
2. 2switch ASIC: forwarding, congestion policy, telemetry

1. 1
2. 2port electrical lanes

1. 1
2. 2optical DSP: FEC/retiming/laser drive

1. 1
2. 2laser + fiber + photodiode

1. 1
2. 2remote DSP
3. 3remote switch or NIC

1. 1Short in-rack alternative:

1. 1switch SerDes
2. 2AEC retimer
3. 3copper twinax
4. 4AEC retimer
5. 5NIC

What each layer can capture

The ASIC captures the switching function: radix, packet buffering, forwarding features, and the software ecosystem that exposes them. Its economic question is whether a platform is designed into a switch, how quickly the design turns, and whether the customer can substitute another silicon or system path. The optical DSP captures a different conversion boundary. It must meet host and line-side electrical/optical requirements, fit the module power and thermal budget, interoperate with optics, and pass manufacturing and customer qualification. The cable retimer captures a third boundary: a short-reach electrical link can avoid an optical module, but it introduces cable-level signal-integrity, diagnostic, and supply-chain choices.

Marvell's AEC page explicitly frames its devices as PAM4 retimers for short-reach copper links such as accelerator-board connections, server-to-top-of-rack links, and switch-to-switch links. That does not make copper universally cheaper or optical universally displaced. Reach, rack geometry, serviceability, power, port speed, and operator practice decide the link choice.

Here is a deliberately small planning model. Suppose a 51.2 Tb/s switch has 64 ports at 800 Gb/s. If 48 ports are used for inter-rack links and each such link needs two pluggable endpoints, the topology calls for 48 × 2 = 96 module endpoints at that switch. If 16 ports instead use short AECs, they require 16 × 2 = 32 cable ends, not 32 optical modules. This is a port-count exercise, not a shipment forecast: it ignores spares, breakouts, deployment phases, and whether the ports are actually populated.

Read power and reach as a trade-off

Higher lane rates reduce the number of lanes needed for a fixed aggregate rate, yet they tighten the electrical channel and make thermal design more consequential. Co-packaged optics shortens the electrical path between switch silicon and optics, while changing repair, manufacturing, and system-integration work. AECs can be compelling over short reach, but their reach is not an invitation to replace every fiber link. The operational question is: at which physical boundary does the operator accept power, heat, failure isolation, and replacement work?

Do not combine an ASIC's advertised throughput with a DSP's stated interface and call the result a system performance measurement. Packet size, congestion control, oversubscription, topology, cabling, optics, and workload communication pattern remain conditions. Likewise, a vendor page can establish an offered capability; it cannot establish utilization or customer economics.

A practical experiment

Build a one-rack link ledger before making any business claim. Choose 800G ports and list: port role, distance, cable or module type, lane count, power budget, vendor qualification status, spare policy, and observed error counters. Then alter one assumption at a time. For example, replace eight 3 m optical links with AECs only if the measured reach, thermal envelope, and error behavior meet the same acceptance rule. Record the module endpoints removed and cable ends added. The result is evidence about one stated design, not a prediction that Broadcom or Marvell captures a fixed share of every AI network.

Evidence boundary

The cited pages support named product architectures and interfaces. They do not identify end customers, contract values, unit volumes, gross margins, or future availability. For financial work, keep a separate dated filing or earnings source beside every number. For technical work, retain the exact port speed, lane rate, form factor, reach, temperature, and test condition. This separation prevents a real hardware fact from becoming an unsupported market conclusion.